Synchronous Buck Timing & Current Ripple

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Synchronous buck timing & current ripple

Key point: a buck's duty is \(D=V_{\mathrm{out}}/V_{\mathrm{in}}\). The inductor sees \(V_{\mathrm{in}}-V_{\mathrm{out}}\) while the high-side FET is on, so \(\Delta I_L\) is that volt-seconds over \(L\). Dead time parks the switch node on a silicon body diode or a GaN reverse drop.

Each step loads a preset. The chips in the lab are the same points.

1
Duty is \(V_{\mathrm{out}}/V_{\mathrm{in}}\).
High-side on-time is \(D\cdot T_{\mathrm{sw}}\). This is not a boost. 12 V to 3.3 V is about 27.5%. \(I_{\mathrm{in}}\) equals inductor current only while the control FET is on, and it is zero in the off-time. Average \(I_{\mathrm{in}}=I_{\mathrm{out}}D\).
2
High duty shrinks the triangle.
5 V to 3.3 V. SW spends most of the period at \(V_{\mathrm{in}}\). \(\Delta I_L\) shrinks with \((V_{\mathrm{in}}-V_{\mathrm{out}})\).
3
The triangle is volt-seconds.
\(\Delta I_{L(\mathrm{pp})}=(V_{\mathrm{in}}-V_{\mathrm{out}})D/(L f_{\mathrm{sw}})\). Peak is \(I_{\mathrm{out}}+\Delta I_L/2\), valley \(I_{\mathrm{out}}-\Delta I_L/2\). Cut \(L\) and \(f_{\mathrm{sw}}\) and the ramp fattens.
4
Dead time is both FETs off.
Inductor current still has to flow. Silicon: body diode, SW sits near \(-0.7\,\mathrm{V}\). Zoom the rising edge so the notch is a real feature, not one pixel.
5
GaN parks SW lower.
No silicon body diode. This model parks SW at \(-2\,\mathrm{V}\) (a \(V_{\mathrm{th}}\)-scale reverse drop). Same kind of zoomed edge, different clamp.

Ideal CCM lumped parts: \(D\) and \(\Delta I_L\) assume the loop holds \(V_{\mathrm{out}}\). Real silicon needs a closed loop and a driver. Download LTspice for LTC7063 (Si) or LT8418 (GaN) with the knobs you just set.

Vin (V) Vout (V) L (µH) fsw (kHz) Iout (A) Dead time (ns) FET type Zoom (rising edge) 1×

Synchronous buck

High-side MOSFET (control FET) ties Vin to SW during on-time. Low-side MOSFET (sync FET) is the low-resistance path in the off-time.

X: - µs, Y: - V

X: - µs, Y: - A

\[ D = \dfrac{V_{\mathrm{out}}}{V_{\mathrm{in}}} \]

= 0%

\[ T_{\mathrm{on}} = D/f_{\mathrm{sw}},\quad T_{\mathrm{off}}=(1-D)/f_{\mathrm{sw}} \]

= 0 ns / 0 ns

\[ \Delta I_{L(\mathrm{pp})} = \dfrac{(V_{\mathrm{in}}-V_{\mathrm{out}})\,D}{L\,f_{\mathrm{sw}}} \]

= 0 A (0% of Iout)

Peak 0 A Valley 0 A Avg \(I_{\mathrm{in}}\) 0 A RMS \(I_{\mathrm{in}}\) 0 A

Try it: start on 12 → 3.3 · 500 kHz and read \(D\) (~27.5%). Switch to High duty · 5 → 3.3 — SW spends most of the period at Vin, \(\Delta I_L\) shrinks with \((V_{\mathrm{in}}-V_{\mathrm{out}})\). Then Choppy \(\Delta I_L\) for a fat triangle. Finish on Si dead time · zoom vs GaN reverse · zoom: same edge, different negative SW clamp.