Foundation
- 1
The need for regulation
Load voltage window, setpoint error, and a step the loop has to catch.
Live - 2
Why a resistor divider fails
A series dropper set at idle cannot hold the rail when the load steps.
Live - 3
Output impedance
Series R, then L, then ceramic and bulk. The |Z| peak is the load-step story.
Live - 4
Energy packets
A tall short pulse and a low steady level can carry the same average power.
Live
Devices
- 5
N-channel MOSFET
Symbol, channel, and the ID–VDS family. Triode versus saturation.
Live - 5b
Common-source load line
The resistor load line picks the Q-point. Saturation is where you want gain.
Live - 5c
MOSFET as a switch
Deep triode, near the origin. RDS(on) is why gate voltage matters.
Live - 5d
Switching and the Miller plateau
CGS then CGD. The flat spot on VGS is where V×I overlap lives.
Live - 6
Gate drive
Bootstrap rides the switch node so a high-side N-FET still sees VGS.
Live - 7
GaN versus silicon
Ratings and drive, at a sketch level. Not a GaN design course.
Planned
Linear path
- 8
Linear regulators
Pass element, dropout, and the heat (Vin−Vout)I. When linear still wins.
Live - 9
Regulators as feedback
The divider holds FB at Vref. Loop gain is what makes Zout small.
Live - 10
Phase margin and the load step
A short bridge into Control Loops. The depth lives on that series.
Planned
Switching topologies
- 11
Why switch
A dropper burns (Vin−Vout)I. Duty moves energy in packets instead.
Live - 12
Which topology
The job picks the cell. Each port is continuous or rectified.
Live - 13
Buck
Switch node is VIN, then ground. Input is the pulse. Output is the triangle.
Live - 14
Boost
Switch node is ground, then VOUT. Input is the triangle. Output is the pulse.
Live - 15
Inverting buck-boost
Switch node is VIN, then −VOUT. Both cables are pulses.
Live - 16
SEPIC
Up or down, same sign. Input is the triangle. Output is the pulse.
Live - 17
Ćuk
Inverts. Both cables are triangles. The output triangle is negative.
Live - 18
Zeta
Switch node is VIN, then −VOUT. Input is the pulse. Output is the triangle.
Live - 19
Flyback
Store on one winding, dump on the other. Both ports are pulses.
Live - 20
CCM, DCM, and burst
Forced continuous current, the DCM ring, and skipping pulses at light load.
Live · 3 - 21
Flyback transformer
Turns ratio, L = N²AL, and series versus parallel windings.
Live · 3 - 22
Forward
Isolated buck. Windings conduct together. Output current is the triangle.
Live - 23
Input EMI filter
One inductor, two jobs: low |Z| at the buck, attenuation toward the LISN.
Live · 3
Limits and requirements
- 24
Sources of inefficiency
RDS(on), diode drop, gate charge, copper, core, and quiescent current.
Planned - 25
Minimum on-time
How low Vout can go before the switch cannot make a short enough pulse.
Planned - 26
DC accuracy versus transient
A ±3% DC window and a load-step dip are two different specs.
Planned
Later / out of v1
Average models, current-mode control, magnetics design, and layout rules. Waveform tools for buck and boost stay under Tools. Phase margin in depth stays on the Control Loops series.